SotaTek has reached an exciting milestone in our silicon journey. The SotaSoC project has completed its design phase, and we submitted the design for tapeout last night. It is a big step because the work is now moving from digital verification into real silicon fabrication, and we expect to receive the first chips around September.
The tapeout is handled via Tiny Tapeout, using a Multi Project Wafer approach that combines multiple designs into one shared mask to reduce cost, and it uses around 0.4 mm2 of silicon.
What is SotaSoC
SotaSoC is a compact RISC V System on Chip optimized for smart home appliances and IoT devices. It is built to be small and practical, yet flexible enough to support real products and real firmware workflows.
On the software side, SotaSoC supports FreeRTOS and bare metal development, and MicroPython support is in development. The project implements RV32E and includes key extensions such as C, Zicsr, and Zifencei, which help balance embedded efficiency with strong control and predictable execution.
SotaSoC also comes with a peripheral set designed for connected devices. It supports QSPI Flash and QSPI PSRAM with 128 Mbit Flash for code and data plus 64 Mbit PSRAM for runtime memory. It includes UART with programmable baud rate, a 48 bit mtime timer, 13 GPIO pins with input interrupts, two PWM channels, SPI master with full mode support, and I2C master with configurable clock options.
Tapeout, Open Source, and What Comes Next
This project is open source by requirement, and we embrace that. The full technical documentation, RTL, and supporting materials are available in the official repositories, along with a dedicated Board Support Package for FreeRTOS and bare metal development.
SotaSoC repository: https://github.com/sotatek-dev/SotaSoC
SotaSoC BSP repository: https://github.com/sotatek-dev/SotaSoC-BSP

The demo photo shared so far was captured from a test running on an Artix 7 FPGA, and it demonstrates the project’s readiness ahead of silicon arrival. When the fabricated chip returns, we will move into bring up, validation, and real hardware testing, then we will share results and learnings with the community.
